Digital Design | Yao Zheng@UHMhttps://gustybear.github.io/tags/digital-design/Digital DesignHugo Blox Builder (https://hugoblox.com)en-usThu, 18 Aug 2022 10:07:39 -1000https://gustybear.github.io/media/logo_hu_d0a0b1783c391ac0.pngDigital Designhttps://gustybear.github.io/tags/digital-design/EE660: Computer Architecture Ihttps://gustybear.github.io/teaching/course_ece660_2022_fall/Thu, 18 Aug 2022 10:07:39 -1000https://gustybear.github.io/teaching/course_ece660_2022_fall/<h1 id="executive-summary">Executive Summary</h1> <p>Fundamental understanding of computer architecture is key to hardware and processor design, compilers, operating systems, and high performance programming. This course explores computer architectures and design techniques of modern microprocessors at various scales. The focus will be given to architectures that can exploit different forms of parallelism, whether they be implicit or explicit, to improve performance. A selection of topics covered by the course include multi-issue superscalar processors, out-of-order processors, Very Long Instruction Word (VLIW) processors, advanced caching, multiprocessor systems, and parallel programming.</p> <h1 id="logistics">Logistics</h1> <ul> <li> <p><strong>CRN</strong></p> <table> <thead> <tr> <th>EE660 001</th> </tr> </thead> <tbody> <tr> <td>76915</td> </tr> </tbody> </table> </li> <li> <p><strong>Personnel</strong>:</p> <table> <thead> <tr> <th></th> <th></th> </tr> </thead> <tbody> <tr> <td>Lecturer: </td> <td>Office Hours: see </td> </tr> </tbody> </table> </li> <li> <p><strong>Format</strong>:</p> <table> <thead> <tr> <th>Lecture Time</th> <th>Lecture Location</th> <th>Textbook</th> <th>Quiz</th> <th>Assignment</th> </tr> </thead> <tbody> <tr> <td>MW 13:30pm-14:45pm</td> <td>Holmes Hall 389</td> <td><em>Required</em>: Computer Architecture: A Quantitative Approach (5th Edition) (PH11)</td> <td>Individual</td> <td>Team</td> </tr> <tr> <td></td> <td></td> <td><em>Optional</em>: Modern Processor Design: Fundamentals of Supperscalar Processors (SL13)</td> <td></td> <td></td> </tr> </tbody> </table> </li> </ul> <h1 id="grading-policy">Grading Policy</h1> <p>&ndash; <strong>Breakdown</strong></p> <table> <thead> <tr> <th>Quiz &amp; Assignment</th> <th>Discussion &amp; Participation</th> </tr> </thead> <tbody> <tr> <td>80%</td> <td>20%</td> </tr> </tbody> </table> <ul> <li> <p><strong>Cutoffs</strong></p> <table> <thead> <tr> <th>A-</th> <th>B-</th> <th>C-</th> </tr> </thead> <tbody> <tr> <td>70%</td> <td>50%</td> <td>30%</td> </tr> </tbody> </table> </li> <li> <p><strong>Proscribed Conduct</strong>: Copying or otherwise cheating on homework, lab reports, or exam will result in a failing grade for the course. More details can be found at student conduct code policies, </p> </li> </ul> <h1 id="schedule">Schedule</h1> <table> <thead> <tr> <th>TIME</th> <th>TOPIC</th> <th>LECTURE</th> <th>READING</th> <th>Quiz</th> <th>ASSG</th> <th>DUE</th> </tr> </thead> <tbody> <tr> <td>Week 01 (Aug 22, 24)</td> <td>Introduction to Computer Architecture</td> <td> </td> <td>PH11: Chapter 1, C1-C16.</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 02 (Aug 29, 31)</td> <td>Review: Pipeline</td> <td> </td> <td>PH11: C26, C30-C58, C61-C81.</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 03 (Sep 7)</td> <td>Review: Pipeline cont.</td> <td>&ndash;</td> <td>&ndash;</td> <td></td> <td></td> <td></td> </tr> <tr> <td>Week 04 (Sep 12, 14)</td> <td>Review: Cache</td> <td> </td> <td>PH11: B1-B40, SL13:177-209.</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 05 (Sep 19, 21)</td> <td>Superscalar Pipelines</td> <td> </td> <td>PH11:C43-C61, SL13:217-236</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 06 (Sep 26, 28)</td> <td>Out-of-Order Processors</td> <td> </td> <td>SL13:338-357</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 07 (Oct 3, 5)</td> <td>Branch, Register Renaming, and Memory Disambiguation</td> <td> </td> <td>SL13:237-273.</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 08 (Oct 10, 12)</td> <td>VLIW Introduction</td> <td> </td> <td>PH11: 192-196, Appendix H</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 09 (Oct 17, 19)</td> <td>Branch Prediction</td> <td> </td> <td>PH11: C26-C30, SL13:219-237, 453-508</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 10 (Oct 24, 26)</td> <td>Advanced Cache Optimizations</td> <td> </td> <td>PH11:71-105</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 11 (Oct 31, Nov 02)</td> <td>Memory Protection</td> <td> </td> <td>PH11 B41-B67, 105-144</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 12 (Nov 07, 09)</td> <td>Vector Processors and GPUs</td> <td> </td> <td>PH11:282-357</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 13 (Nov 14, 16)</td> <td>Multithreading</td> <td> </td> <td>PH11:221-259</td> <td></td> <td></td> <td></td> </tr> <tr> <td>Week 14 (Nov 21, 23)</td> <td>Parallel Programming and Small Multiprocessors</td> <td> </td> <td>PH11:377-400, 343-378</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 15 (Nov 28, 30)</td> <td>Interconnection Network</td> <td> </td> <td>PH11:Appendix F</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 16 (Dec 05, 07)</td> <td>Large Multiprocessors (Directory Protocols)</td> <td> </td> <td>PH11:378-386, 400-429</td> <td>&ndash;</td> <td></td> <td></td> </tr> <tr> <td>Week 17 (Dec 12, 16)</td> <td>Elective Topic</td> <td>&ndash;</td> <td>&ndash;</td> <td>&ndash;</td> <td></td> <td></td> </tr> </tbody> </table>